Telecommunications service providers face rapidly growing usage demands. The exponential increase of mobile subscribers, Internet of Things devices and 5G use cases adds to the complexity and cost of network build-out and operations. Many new use cases require low latency and high bandwidth and can generate new revenue streams for the service providers while reducing the total cost of ownership. A new type of platform is needed to deliver the best of IT while meeting mobility network requirements. This new infrastructure will need to be cost-eﬀective, ﬂexible, easy to deploy and scale efficiently with growing traffic and services. These conditions can be met through an optimized, joint hardware and software solution using the leading COTSx86-based platforms and hardware acceleration by FPGA. Intel is working with industry leaders who are building solutions that transform the network for a data-centric world from NFVi, Access, to the Edge/Core.
Available through Juniper Networks, Contrail is an SDN software designed to enable better management and control for service delivery providers. Users of Contrail can see an increase in overall server performance and utilization for vRouter-based infrastructures in telecommunications environments.
Open vSwitch, is an open-source multi-layer virtual switch that’s designed for massive network automation through programmatic extension, while supporting standard management interfaces and protocols. Intel® FPGA PAC N3000 provides a full offload of OVS fastpath and supports Live Migration by overcoming traditional concerns with SR-IOV.
Segment routing version 6 (SRv6) is designed for the next-generation of networking beyond source routing by addressing the issues of IP, MPLS, and IPv6. By providing better traffic routing, SRv6 is important for emerging technologies like 5G.
Virtualized Radio Access Network is the next evolution for CoSPs to optimize their Radio network by virtualizing radio network functions on COTS Hardware to provide better performance and lower CapEx and OpEx.
Turbo Coding is the channel coding solution for (FEC) Forward Error Correction in LTE cellular communications.
Low Density Parity Check (LDPC) is the channel coding solution for (FEC) Forward Error Correction in 5G cellular communications.
The O-RAN alliance is focused on defining the emerging fronthaul connection between (DU) Distributed Unit and Radio requirements.
Accelerated 5GCN/ vEPC solution running on Intel® FPGA PAC N3000 offers mobile operators the performance and flexibility needed to keep up with traffic demand and network scaling to offer services such as edge computing while reducing CapEx and OpEx.
Virtual Broadband Network Gateways (vBNG) help service providers streamline packet processing, separate the control plane and data plane for dynamic scaling, improve agility, optimize network performance. Using Intel® FPGA PAC N3000 to accelerate functions such as hierarchical QoS in a vBNG dataplane can further increase gateway throughput, reduce jitter and latency, thus improve subscriber’s experience for services such as live video-streaming.
Virtual Customer Premises Equipment (vCPE) help providers to deliver network services such as routing, NAT, security, and VNP connectivity to enterprises by using software on COTS server rather than dedicated hardware devices. Accelerating vCPE using Intel® FPGA PAC N3000 increases throughput while reduces CapEx and OpEx.
IP-based 4G and 5G networks are more vulnerable to intrusions and attacks. Virtual Firewalls (vFirewall) allows service providers to defend their network infrastructure and mobile subscribers from attacks using COTS hardware. Using Intel® FPGA PAC N3000 to parse and classify packets up to layer 4 significantly improves the vFirewall capability. This capability includes mitigation of large-scale DDoS attacks such as network floods, port scans and sweeps, or connection floods. By detecting and stopping these types of attacks, accelerated vFirewall prevents congestion and overloading of the control and bearer planes.
Internet Protocol Security (IPsec) provides layer 3 data authentication, integrity, and confidentiality between 2 communication points across the IP networks. Transport Layer Security (TLS) provides privacy and data integrity between communicating computer applications such as web browser, email, & instant message. Encrypting and decrypting packets is compute-intensive. In-line accelerating cryptography for IPsec and TLS using Intel® FPGA PAC N3000 improves traffic throughput, reduces latency, allows custom cyphers, and saves valuable CPU cores for revenue-generating workloads.
Intel® FPGA-based acceleration platforms include PCI Express*-based Intel® FPGA Programmable Acceleration Cards (Intel® FPGA PAC), socket-based server platforms with integrated FPGAs, and others that are supported by the Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs.