ID de l'article: 000086178 Type de contenu: Dépannage Dernière révision: 23/11/2017

Pourquoi mon Intel® Arria® 10 SoC ne démarre-t-il pas en utilisant FPGA mode d’amorçage lorsque toutes les E/S dédiées sont inutilisées ?

Environnement

  • Intel® Quartus® Prime Pro Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Descriptif

    En raison d’un problème dans le logiciel Intel® Quartus® Prime Pro/Standard, les paramètres d’amorçage U désactivés OSC_CLK_1_HPS, les nPOR_RST et les ports d’entrée nRST_HPS.

    Résolution

    1) Passez dans le dossier hps_isw_handoff de votre conception.

    2) Ouvrez hps.xml

    3) Trouvez la section suivante.

    <>

    <!-- broche non réutilisée 1 -->

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_1.rtrim' value='1' />

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_1.input_buf_en' value='0' />

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_1.wk_pu_en' value='1' />

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_1.pu_slw_rt' value='0' />

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_1.pd_slw_rt' value='0' />

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_1.pu_drv_strg' value='0' />

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_1.pd_drv_strg' value='0' />

    <!-- broche non réutilisée 2 -->

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_2.rtrim' value='1' />

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_2.input_buf_en' value='0' />

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_2.wk_pu_en' value='1' />

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_2.pu_slw_rt' value='0' />

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_2.pd_slw_rt' value='0' />

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_2.pu_drv_strg' value='0' />

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_2.pd_drv_strg' value='0' />

    <!-- broche non réutilisée 3 -->

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_3.rtrim' value='1' />

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_3.input_buf_en' value='0' />

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_3.wk_pu_en' value='1' />

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_3.pu_slw_rt' value='0' />

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_3.pd_slw_rt' value='0' />

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_3.pu_drv_strg' value='0' />

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_3.pd_drv_strg' value='0' />

    4) Remplacez ci-dessus 3 paramètres inutilisés par les paramètres OSC_CLK_1_HPS, nPOR_HPS et nRST_HPS suivants, et enregistrez hps.xml.

    <>

    <!-- OSC_CLK_1_HPS - >

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_1.rtrim' value='1' />

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_1.input_buf_en' value='1' />

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_1.wk_pu_en' value='1' />

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_1.pu_slw_rt' value='0' />

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_1.pd_slw_rt' value='0' />

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_1.pu_drv_strg' value='8' />

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_1.pd_drv_strg' value='10' />

    <!-- nPOR_HPS - >

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_2.rtrim' value='1' />

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_2.input_buf_en' value='1' />

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_2.wk_pu_en' value='1' />

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_2.pu_slw_rt' value='0' />

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_2.pd_slw_rt' value='0' />

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_2.pu_drv_strg' value='8' />

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_2.pd_drv_strg' value='10' />

    <!-- nRST_HPS - >

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_3.rtrim' value='1' />

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_3.input_buf_en' value='1' />

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_3.wk_pu_en' value='1' />

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_3.pu_slw_rt' value='0' />

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_3.pd_slw_rt' value='0' />

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_3.pu_drv_strg' value='8' />

    <config name='i_io48_pin_mux_dedicated_io_grp.configuration_dedicated_io_3.pd_drv_strg' value='10' />

    5) Créez un projet uboot et créez le fichier bin à partir d’un nouveau fichier de transfert

    Produits associés

    Cet article concerne 1 produits

    FPGA SoC Intel® Arria® 10 GX

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