Generating a Netlist for Third-Party Synthesis Tools from Megafunctions and Altera® IP Functions

You can direct the IP Catalog to generate a special, non-functional Verilog Design File (.v) Definition netlist for use by some third-party EDA synthesis tools to estimate timing and resource usage for your Altera® IP or Licensed Altera IP Definition. This option is available for all Altera® IP and most Altera® IP functions. The generated netlist file name is <variation>_syn.v.

To generate a netlist from a Altera® IP or from a Altera® IP function using the IP Catalog, follow these steps:

  1. Launch the IP Catalog and begin creating your Altera® IP or Altera® IP function.
  2. On the EDA tab, under Timing and resource estimation, turn on Generate netlist.
  3. Click Next to continue creating your Altera® IP or Altera® IP function.
Note:

For Altera® IP functions that do not have an EDA tab, click Set Up Simulation on the toolbar, and in the Setup Simulation dialog box, turn on Generate netlist.