Manuel de l’appareil Cyclone® IV, volume 1, chapitre 10 : Test de balayage des limites JTAG

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Cyclone® IV FPGAs Support Cyclone® IV FPGAs Support Cyclone® IV FPGAs Support

654525
2014-04-02
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Descriptif

Décrit les fonctionnalités du test BST (boundary-scan test) qui prennent en charge les normes IEEE Std. 1149.1 et IEEE Std. 1149.6. La norme IEEE Std. 1149.6 (AC JTAG) est uniquement prise en charge sur les émetteurs-récepteurs d’interface série haute vitesse (HSSI) des périphériques Cyclone® IV GX.

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