Cyclone® IV Device Handbook, volume 1, chapitre 5 : Réseaux d’horloge et PLL

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Cyclone® IV FPGAs Support Cyclone® IV FPGAs Support Cyclone® IV FPGAs Support

653862
2012-09-30
Public

Descriptif

Décrit les réseaux d’horloges hiérarchiques et les boucles à verrouillage de phase (PLL). Reconfigurez la fréquence de l’horloge du compteur PLL et le déphasage en temps réel et ajustez dynamiquement le déphasage de l’horloge de sortie.

Instructions d’utilisation

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