Depending on the performance and feature requirements of the access platform, we offer a wide silicon portfolio to choose from, including the low-cost Intel Cyclone® device series, the midrange Intel Arria® device series, and the high-performance Intel Stratix® device series. In addition, Intel provides robust solutions to enable quick time to market and cost-effective implementations of:
Access networks are considered the “last mile” of delivering connectivity from communication providers to home users. Digital Subscriber Line (DSL), Passive Optical Network (PON), and Cable are the three main broadband access technologies deployed by different operators in different regions of the world.
DSL uses traditional phone lines to transmit the data. There are a variety of DSL technologies such as Asymmetric Digital Subscriber Line (ADSL) and Very High Speed Digital Subscriber Line (VDSL), offering different data bandwidths. Techniques such as channel bonding and vectoring can be used to increase the DSL bandwidth.
PON uses a point-to-multipoint optical fiber network to transmit data. There are multiple flavors of PON technologies as well, with the most popular being EPON and GPON.
Cable uses existing cable television infrastructure to provide broadband Internet access, and it is mostly adopted in North America and Europe. The standard used for cable broadband access is Data Over Cable Service Interface Specification (DOCSIS).
Intel and partners can support your development methodology, whether you want to develop your access application in house or buy off-the-shelf IP solutions. A programmable platform allows you to scale your design across applications, features, and data rates. You will be able to swiftly incorporate new features, operator requirements, and density variations.
The Figure below shows a generic multi-service access platform with both DSL and PON line cards. The client side processing portion of the access line card varies depending on the access technology. It could be a DSL chipset, a PON MAC or DOCSIS MAC. However, regardless of the access technology, packet processing and traffic management functions are needed to process the aggregated end-user flows and provisioning per different QoS requirements from different operators in different applications.
A combination of Intel’s multi-threaded RISC-based soft datapath processor and hardware acceleration blocks implemented in FPGA fabric can be well suited to perform the Layer 2 to Layer 4 packet processing functions needed for access platforms such as classification, table look-up, policing, filtering, and packet forwarding. As the service providers try to maximize end user experience by having the ability to differentiate services of each user and more and more users get aggregated onto the same pipe, it is very important to be able to enforce the service level agreement (SLA) per user to guarantee fair bandwidth allocation. Intel’s FPGA-based traffic management solutions provide you with the flexibility and scalability needed to satisfy different QoS requirements.
Intel provides vast resources to help the user learn about FPGAs both as a general concept and specific facets of FPGA design. A good starting point to learn about FPGAs and the Intel Quartus® Prime design software is from the Training page.
General training courses on relevant topics are:
To further accelerate the wireless design process, we also provide a multitude of IP blocks, MegaWizards, reference designs and white papers.