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PCI Express* Architecture

PCI Express* Architecture is a standards-based serial data, multi-lane interconnect for high-performance, scalable interconnects.

PCI Express* Architecture

The Intel developer network for PCI Express* architecture is a developer community offering access to resources and peers.

Serial ATA AHCI: Specification, Rev. 1.2

Defines functional behavior and Advanced Host Controller Interface software for moving data between system memory and serial ATA devices.

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Serial ATA AHCI: Device Sleep Technical Proposal, Rev. 1.3.1

Programming register definitions, a method to detect support for direct software control, and a method for HW to autonomously enter and exit DevSleep.

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Serial ATA (SATA)

Intel helps define new Serial ATA standards for faster and more efficient data transfer.

Thunderbolt™ for Developers

Transforming I/O device interconnectivity and transfer performance, Thunderbolt™ technology enables flexible, innovative system design configurations.

Enhanced Host Controller Interface Specification

Information about the Enhanced Host Controller Interface specification, including licensing, revisions, addendums, and technical questions.

USB – Universal Serial Bus 3.0 and 2.0 Specifications

Technical details to understand USB 3.0 and 2.0 spec requirements, design compatible products, download developer-related PDFs, and more.

USB 3.0* Radio Frequency Interference on 2.4 GHz Devices

White Paper: Notice of certain USB 3.0* devices and cables causing radio frequency interference to wireless devices operating in the 2.4 GHz ISM band.

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