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PCI Express* Architecture

PCI Express* Architecture is a standards-based serial data, multi-lane interconnect for high-performance, scalable interconnects.

PCI Express* Architecture

PCI Express* Architecture is a standards-based serial data, multi-lane interconnect for high-performance, scalable interconnects.

Thunderbolt™ Technology: The Transformational PC I/O

Technology Brief: Thunderbolt™ technology is a transformational I/O innovation and provides a 10 Gbps of full-duplex bandwidth per channel.

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Serial ATA AHCI: Specification, Rev. 1.3

Defines functional behavior and Advanced Host Controller Interface software for moving data between system memory and serial ATA devices.

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Case Study: Intel and SATA3

Intel creates standard for SATA 3, an interface designed for fast, more efficient transfer of data between a computer and storage device.

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Enhanced Host Controller Interface Specification

Information about the Enhanced Host Controller Interface specification, including licensing, revisions, addendums, and technical questions.

Universal Serial Bus 3.0 and 2.0 Specifications

Technical details to understand USB 3.0 and 2.0 spec requirements, design compatible products, download developer-related PDFs, and more.

Universal Serial Bus EHCI Compliance Testing Program

The EHCI compliance testing evaluates the EHCI controller function of a USB 2.0 Host controller.

Serial ATA AHCI: Device Sleep Technical Proposal, Rev. 1.3.1

Programming register definitions, a method to detect support for direct software control, and a method for HW to autonomously enter and exit DevSleep.

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PCI Express* Architecture Resources

Get additional information about the PCI Express* architecture with a white paper, developer’s guide, and community resources.