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Zlib Compression on Intel® Architecture Processors

White Paper: High Performance Zlib compression on Intel® architecture processors. (v.2, Apr. 2014)

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The Basics of Intel® Architecture

White Paper: Describes the basic operation and function of platform ingredients used in three classes of Intel® architecture platforms. (Jan. 2009)

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Fast SHA-256 Implementations on Intel® Architecture Processors

White Paper: Describes highly-optimized Fast SHA-256 cryptographic hash algorithm implementations for Intel® processors. (v.001, May 2012)

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Hardware-Based Security for Intelligent Retail Devices: Paper

White Paper: Describes Intel® technologies for intelligent retail device security, such as Intel® Platform Protection Technology. (v.1, Jan. 2013)

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Improve IPSec Performance Using Intel® AES Instructions

White Paper: Demos IPSec performance capabilities in Linux* using Intel® AES New Instructions and Galois Counter Mode* algorithm combination.

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High Performance DEFLATE Compression Intel® Architecture: Paper

White Paper: The performance characteristics of fast prototype implementations of DEFLATE compression on Intel® processors addresses server burdens.

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LTE Control Plane on Intel® Architecture

White Paper: LTE control plane overview and processor selection instructions for optimizing system power and performance. (v.1, Jan. 2013)

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Design Considerations for Network Applications on Linux*: Paper

White Paper: Presents design considerations for developing network applications using an Intel® multi-core processor-based system on Linux*.

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PCLMULQDQ Instruction and Elliptic Curve Cryptography: Paper

White Paper: Study uses Intel® polynomial multiplication instructions to increase the performance of Elliptic Curve Cryptography by up to 600 percent.

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Intel® Quark™ SoC X11000 Platform – MRC Swapping Code: White Paper

White Paper: Guidelines on memory reference code (MRC) location in BIOS when bit swapping is used with the Intel® Quark™ SoC X1000. (v.1, Nov. 2014)

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