■ IEEE 802.3 10BASE-T/100BASE-TX ■ compliant physical layer interface ■ ■ IEEE 802.3u Auto-Negotiation support ■ ■ Digital Adaptive Equalization control ■ Link status interrupt capability ■ ■ XOR tree mode support ■ ■ 3-port LED support (speed, link and ■ activity) ■ 10BASE-T auto-polarity correction ■ ■ LAN Connect Interface 1 This device is lead-free. That is, lead has not as an impurity at <1000 ppm. The Material impurity levels and the concentration of other banned materials, is available at: In addition, this device has been tested and previous versions of the device. For more information regarding lead-free products Field Sales representative. Additional Features ■ The 82562G PLC supports drop-in replacement in replacement, strapping options enable new —LED support for three logic configurations. —LAN disable function using one pin. —Increased transmit strength. ■ The receive BER performance increases the ■ Return Loss performance is improved. Diagnostic loopback mode 1:1 transmit transformer ratio support Low power (less than 300 mW in active transmit mode) Reduced power in “unplugged mode” (less than 50 mW) Automatic detection of “unplugged mode” 3.3 V device 1 Lead-free 48-pin Shrink Small Outline Package for both leaded and lead-free designs. (Devices that are lead-free are marked with a circled “e3” and have the product code prefix: LUxxxxxx). been intentionally added, but lead may still exist Declaration Data Sheet, which includes lead Restriction on Hazardous Substances (RoHS)- ftp://download.intel.com/design/packtech/material_content_IC_Package.pdf#pagemode=bookmarks conforms to the same parametric specifications as from Intel Corporation, contact your Intel with the 82562ET. If it is not used as a drop- operating modes: margin for cable length. Revision 1.3 April 2005 Revision History Revision 1.0 1.1 1.2 1.3 Revision Date October 2004 November 2004 January 2005 April 2005 Description Initial release (confidential status). • Updated lead-free device information. • Updated Table 1 and Table 2 to reflect correct hardware configurations and LED logic functionality. • Corrected signal names to match design guide and reference schemat- ics. • Added a note for PHY signals RBIAS100 and RBIAS10 to Section 4.3. • Added internal/external pull-up/pull-down resistor values to the Hardware Configuration table and signal definition tables for TESTEN, ISOL_EXEC, ISOL_TI, ISOL_TCK, and ADV10/LAN_DISABLE# Information in this document is provided in connection with Intel® products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel's Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel® products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Intel products are not intended for use in medical, life saving, or life sustaining applications. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for future definition and shall have no responsibility Read the full 82562G 10/100 Mbps Platform LAN Connect (PLC) Networking Silicon Datasheet Product Features.